应我院计算机系的邀请，美国加州大学谭向东教授将于近期来我院进行学术讲座。具体安排如下：

讲座题目：Variational Analysis of Non-Tree Clock Networks Considering Environmental Uncertainty

讲座人：加州大学河畔分校

             谭向东  教授/博士

时间：7月8日（周三）下午3：00-5：30

地点：行政楼辅楼一层报告厅

讲座内容：

It is challenging to verify clock-skew for large-scale non-tree clock networks with environmental uncertainties such as supply voltage fluctuation and thermal temperature variations. In this talk, I will present a new variational clock-skew analysis via parameterized incremental truncated-balanced-realization method. Environmental uncertainties are firstly structurally added into the parameterized state equation of clock networks. Then a compact macromodel is obtained by the structure-preserving subspace reduction by the extended truncated-balanced realization technique. To reduce the computational cost of singular-value decomposition (SVD) during the reduction process, we propose an incremental SVD method that only needs to partially update the projection matrix by analyzing the perturbed output waveform owning to environmental uncertainties. Experiments on a number of clock networks show that compared with the macromodeling by the fast TBR method, our method reduces the computational cost in the order of 100X with a similar accuracy.  In addition, compared with the macromodeling by the Krylov-subspace-based method, our method reduces the waveform error by 2X with a similar runtime.

讲座人简介：

Dr. Tan is an Associate Professor in the Department of Electrical Engineering, University of California at Riverside. He received his B.S. and M.S. degrees in electrical engineering from Fudan University, Shanghai, China in 1992 and 1995, respectively and the Ph.D. degree in electrical and computer engineering from the University of Iowa, Iowa City, in 1999.

Dr. Tan research interests include several aspects of design automation for VLSI integrated circuits – modeling and simulation of analog/RF/mixed-signal VLSI circuits, high performance power and clock distribution network simulation and design, signal integrity, power modeling, architecture-level thermal modeling and simulation, thermal optimization in nanometer VLSI design, and embedded system designs based on FPGA platforms. He has published 2 books, over 130 peer-reviewed journal and conference papers and gave over 30 invited presentations, tutorials and short courses at conferences and workshops.